Method for making a direct chip attach device and structure

ABSTRACT

A method for forming a direct chip attach device ( 1 ) includes attaching an electronic chip ( 3 ) to a lead frame structure ( 2 ), which includes a flag ( 18 ). Next, conductive studs ( 22 ) are attached to bond pads ( 13 ) on electronic chip ( 3 ) and flag ( 18 ) to form a sub-assembly ( 24 ). Sub-assembly ( 24 ) is then placed in a molding apparatus ( 27,47 ), which includes a first plate ( 29,49 ) and second plate ( 31,51 ). Second plate ( 31,51 ) includes a cavity ( 32,52 ) for receiving electronic chip ( 3 ) and flag ( 18 ), and pins ( 36,56 ). During a molding step, pins ( 36,56 ) contact conductive studs ( 22 ) to prevent encapsulating material ( 4 ) from covering studs ( 22 ). This forms openings ( 6 ) to receive solder balls ( 9 ) during a subsequent processing step.

BACKGROUND OF THE INVENTION

This invention relates, in general, to electronic device packaging, andmore specifically to methods and apparatus for forming interconnects inflip-chip packages.

Flip-chip microelectronic packaging technology has been in existence formore than 30 years, and involves a direct electrical connection ofdownward facing (hence, “flipped”) electronic components or chips tosubstrates, circuit boards, or carriers. The electrical connection ismade through conductive bumps or balls connected to bond pads on boththe chip and the substrate. In contrast, wire bonding, which is an oldertechnology, uses upward facing chips with a wire connection between eachbond pad and a corresponding lead or pin on a lead frame.

Flip-chip components are predominantly semiconductor devices. However,components such as passive filters, detector arrays, and sensor devicesare also beginning to be used in flip-chip form. Flip-chip is alsoreferred to as Direct Chip Attach (DCA), a more descriptive term,because the chip is-directly attached to a substrate, circuit board, orcarrier by conductive bumps.

Although flip-chip technology has progressed to include a wide varietyof materials and methods for bumping, attaching and underfillingdevices, challenges still exist in solving problems with tighter spacerequirements, reduced costs, and enhanced device performance andreliability.

Accordingly, a need exists for improved structures and processes forforming flip-chip type packages.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 illustrates, an enlarged isometric view of a direct chip attachdevice manufactured according to the present invention;

FIG. 2 illustrates an enlarged, cross-sectional view of the embodimentof FIG. 1 taken along reference line 1—1 at an early stage offabrication;

FIG. 3 illustrates an enlarged, cross-sectional view of the embodimentof FIG. 1 at a further stage of fabrication;

FIG. 4 illustrates an enlarged, cross-sectional view of an apparatusaccording to the present invention for forming the embodiment of FIG. 1;

FIG. 5 illustrates another enlarged, cross-sectional view of theapparatus FIG. 4;

FIG. 6 illustrates an enlarged, cross-sectional view of the embodimentof FIG. 1 at a subsequent stage of fabrication;

FIG. 7 illustrates an enlarged, cross-sectional view of the embodimentof FIG. 1 at a still further stage of fabrication; and

FIG. 8 illustrates an enlarged, cross-sectional view of a secondembodiment of an apparatus according to the present invention.

DETAILED DESCRIPTION OF THE DRAWINGS

In general, the present invention pertains to a method for formingopenings in molded direct chip attach (DCA) structures for connectingsolder bumps to an encapsulated device. In particular, an electronicchip is attached to a lead frame structure and a conductive bump isattached to a bond pad on a surface of the chip. The lead framesubstrate and electronic chip are then encapsulated in a mold cavity.During the encapsulation step, pins, studs or protrusions within themold cavity contact the conductive bumps to prevent encapsulatingmaterial from forming over the conductive bumps to provide openings. Ina further step, solder balls are attached to the conductive bumpsthrough the openings.

Currently, DCA devices are manufactured as follows. An electronic chipis attached to a lead-frame structure. Next, the chip is encapsulatedwith a passivation material or mold compound using conventionalinjection-molding techniques. After the molding process is complete andthe devices are removed from the molding apparatus, openings are formedin the outer surface of the molded device to expose contact areas on theelectronic chip. Solder balls are then attached to provide interconnectsbetween the encapsulated chip and a next level of assembly.

One approach to forming openings in the outer surface of the moldeddevice uses laser burning. Laser burning has several disadvantagesincluding long process times, expensive equipment, and cumbersometechniques to provide proper alignment. Chemical etching is anothertechnique used to form openings. This technique requires specializedchemicals that are very expensive and hazardous. Additionally, chemicaletching techniques are time consuming and require expensive processingequipment.

The present invention is better understood by referring to FIGS. 1–8together with the following detailed description. For ease ofunderstanding, like elements or regions are labeled the same throughoutthe detailed description and FIGURES.

FIG. 1 shows an enlarged isometric view of a DCA device or structure 1manufactured according to a method described in FIGS. 2–7. DCA device 1includes a lead frame or support substrate 2, an electronic chip, deviceor component 3 (shown in FIG. 2), and encapsulant or protective layer 4having openings 6 formed in upper surface 7. Solder or conductive balls,spheres, or bumps 9 are coupled to chip 3 and lead frame 2 through or inopenings 6.

FIG. 2 illustrates an enlarged cross-sectional view of DCA device 1 atan early stage of fabrication taken along reference line 1—1 of FIG. 1.By way of example, chip 3 comprises a power MOSFET, logic, sensordevice, passive device, or bipolar device. Chip 3 includes bond pads orcontacts 13 on an upper surface 14. Bond pads 13 comprise, for example,aluminum/aluminum-silicon/aluminum-silicon-copper. Chip 3 is attached tolead frame 2 using conventional techniques such as eutectic die attach,conductive epoxies or soft solder processes to form a die attach layer17. For example, chip 3 is attached using a lead/tin (Pb/Sn) soft solderprocess.

As shown FIG. 2, lead frame 2 further includes a flag 18, which providesan upper or top-side contact to lower surface 19 of chip 3. When chip 3comprises a power MOSFET for example, contacts 13 form source contactsand flag 18 provides a top-side drain contact. Lead frame 2 includingflag 18 preferably comprises copper, a copper alloy (e.g., TOMAC 4,TAMAC 5, 2ZFROFC, or CDA194), a copper plated iron/nickel alloy (e.g.,copper plated Alloy 42), or the like.

Next, as shown in FIG. 3, conductive bumps, balls, or studs 22 areattached to contacts 13. In a preferred embodiment, a conductive stud 22is also attached to flag 18. In an alternative embodiment, the height offlag 18 is designed to match the height of studs 22 and contacts 13 anda stud 22 is not placed on flag 18.

Conductive studs 22 are attached using, for example, ultrasonic,thermocompression, or thermosonic bonding techniques. Conductive studs22 comprise, for example, gold or copper. In one embodiment, conductivestuds 22 are formed with wire bond balls using conventional wiringbonding techniques. Preferably, any remaining portion of wire above thewire bond ball is removed, which leaves only conductive studs 22 on bondpads 13 and flag 18 as shown in FIG. 3.

Alternatively, conductive studs 22 are formed using solder balls thatare reflowed for electrical and mechanical attachment to bond pads 13and flag 18. In a further embodiment, conductive studs 22 are formedusing conductive epoxies. Preferably, conductive studs 22 have a heightfrom about 75 microns to about 1,500 microns. Once conductive studs 22are attached, a sub-assembly 24 is formed.

FIG. 4 shows an enlarged cross-sectional view of sub-assembly 24 at thebeginning of a next stage of processing. Sub-assembly 24 is placed intoa molding apparatus 27 for encapsulation. Molding apparatus 27 includesan upper half, upper plate, or first half 29 and a lower half, lowerplate, or second half 31. In a preferred embodiment, lower plate 31further includes a cavity, well or well portion 32 formed in an upper ormajor surface 34 for receiving or accommodating chip 3 and flag 18.

According to the present invention, well 32 includes pins, studs,protrusions, or bumps 36 formed, coupled, or attached on surface 37 ofwell 32. For example, pins 36 are formed when surrounding material isremoved from lower plate 31 during the fabrication or machining of well32. That is, pins 36 and lower plate 31 are machined from a single pieceof material. Alternatively, pins 36 are attached to surface 37 usingwelding or brazing techniques. In a preferred embodiment, pins 36comprise carbon steel.

According to the present invention, pins 36 are formed or placed in well32 in locations that align with conductive studs 22 on sub-assembly 24so that when upper plate 29 is lowered against sub-assembly 24, pins 36are in contact with studs 22 as shown in FIG. 5. The contact provides amask or blocking structure or device that prevents mold compound orencapsulating material from covering the upper surface of studs 22 toform openings 6 during the molding or encapsulating step. In alternativeembodiment, the cavity and pins are formed in upper plate 29 andsub-assembly 24 is flipped up when placed in molding apparatus 27.

Mold compound is then injected into well 32 using conventional means toencapsulate chip 3 and flag 18 to form protective layer 4 shown inFIG. 1. Protective layer 4 comprises, for example, an epoxynovolac-based resin.

In a preferred embodiment, and as shown in FIG. 4, the upper surfaces ofpins 36 are flat with the upper edges chamfered or rounded to provide abeveled or rounded edge in openings 6 of DCA device 1. This is moreclearly shown in FIG. 6, which is an enlarged cross-sectional view ofsub-assembly 24 after the molding process step. The beveled or chamferededge provides for enhanced alignment during the placement of solderballs 9 in openings 6. By way of example, pins 36 have a height on theorder of 0.05 to 0.15 millimeters (mm) and a diameter of 0.20 to 0.50 mmwhen DCA device 1 comprises, for example, a power MOSFET chip. Thesedimensions are variable and can be adjusted according to individualdevice and package constraints.

By forming openings 6 during the encapsulation process, moldingapparatus 27 is advantageous over other techniques such as laser burningor chemical etching because the need for additional processing equipmentand consumables (e.g., chemicals, utilities, etc.) is eliminated.Additionally, this reduces cycle time thus further reducing themanufacturing costs of DCA device 1.

After the molding process, encapsulant 4 is post-cured, and then abarrier layer 41 is formed on studs 22 in openings 6. Preferably,barrier layer 41 comprises a material that is metallurgically compatiblewith studs 22 and solder balls 9. That is, barrier layer 41 preventsinter-diffusion of the elements of studs 22 and solder balls 9. Forexample, when studs 22 comprise gold and solder balls 9 compriselead/tin, barrier layer 41 preferably comprises a nickel layer formedusing electroless nickel plating or electrolytic nickel plating.

FIG. 7 shows an enlarged cross-sectional view of DCA device 1 aftersolder balls 9 have been attached. Solder balls 9 comprise, for example,a lead/tin alloy, and are attached using conventional fluxing andre-flow techniques. After re-flow, solder balls 9 typically take-on ahalf hemisphere shape.

FIG. 8 shows an enlarged cross-sectional view of a molding apparatus 47according a second embodiment of the present invention. Moldingapparatus 47 includes an upper half or plate 49 and a lower half orplate 51. Lower plate further includes a cavity, well or well portion 52formed in upper surface 54. In this second embodiment, pins 56 areplaced in openings 57 formed in well 52. This embodiment allows one touse pins having different tip geometries (e.g., rounded, flat, square,etc.) dependent on specific device and package requirements.Additionally, molding apparatus 47 allows for new pins to be added in acost-effective manner when older pins wear out or become damaged.

Thus, it is apparent that there has been provided, in accordance withthe present invention, a method for forming a direct chip attach devicehaving openings in the molded package to allow for solder ball contactto an encapsulated chip. In addition, a molding apparatus has beenprovided that includes pins to advantageously form the openings duringthe molding process. The method and structure provide improvements overother techniques by eliminating processing steps that require expensiveequipment and materials.

Although the invention has been described and illustrated with referenceto specific embodiments thereof, it is not intended that the inventionbe limited to these illustrative embodiments. Those skilled in the artwill recognize that modifications and variations can be made withoutdeparting from the spirit of the invention. For example, moldingapparatus 27 can be inverted so that the cavity and the pins are formedin the upper plate. Therefore, it is intended that this inventionencompass all such variations and modifications as fall within the scopeof the appended claims.

1. A method for forming a direct chip attach device comprising the stepsof: attaching an electronic chip to a lead frame structure, wherein theelectronic chip includes a bonding pad; attaching a conductive bump tothe bonding pad; placing the electronic chip and lead frame structureinto a molding apparatus, wherein the molding apparatus has a wellportion with a removable pin coupled to a first surface of the wellportion; contacting the removable pin to the conductive bump; moldingthe electronic chip with an encapsulating material, wherein theremovable pin masks the conductive bump to provide an opening in theencapsulating material over the conductive bump, and wherein theconductive bump is recessed within the opening; and thereafter forming abarrier layer overlying the conductive bump.
 2. The method of claim 1wherein the step of placing the electronic chip and the lead framestructure into the molding apparatus includes placing the electronicchip and the lead frame structure into the molding apparatus, whereinthe well portion has a plurality of removable pins to the first surface.3. The method of claim 1 further comprising the step of coupling asolder ball to the electronic chip in the opening.
 4. The method ofclaim 1 wherein the step of placing the electronic chip and the leadframe structure into the molding apparatus includes placing theelectronic chip and the lead frame structure into the molding apparatus,wherein the removable pin has a flat upper surface and rounded upperedges.
 5. The method of claim 1, wherein the step of attaching theelectronic chip to the lead frame structure includes attaching a powerMOSFET device.
 6. A process for forming a flip-chip device comprisingthe steps of: placing a sub-assembly into a mold apparatus having acavity, wherein the sub-assembly comprises an electronic chip attachedto a support substrate, and wherein the electronic chip has a firstconductive stud coupled to the electronic chip; contacting the firstconductive stud with a first blocking device in the cavity; injecting anencapsulating material into the cavity to encapsulate the electronicchip, wherein the first blocking device masks the first conductive studto form an opening in the flip-chip device, wherein the openingcomprises a chamfered edge, and wherein the first conductive stud isrecessed within the opening; and forming a barrier layer overlying thefirst conductive stud.
 7. The process of claim 6 further comprising thestep of attaching a solder ball to the flip-chip device in the opening.8. The process of claim 6 wherein the step of contacting the firstconductive stud includes contacting the first conductive stud with aremovable pin coupled to the mold apparatus.
 9. The method of claim 8,wherein the step of contacting includes contacting the first conductivestud with a removable pin having a flat upper surface and rounded upperedges to form the chamfered opening.
 10. The method of claim 6, whereinthe step of placing the sub-assembly includes placing a sub-assemblyhaving an electronic chip attached to a support substrate, wherein thesupport substrate includes a flag.
 11. The method of claim 10, furthercomprising the step of contacting the flag with a second blocking devicein the cavity.
 12. The method of claim 6, wherein the step of placingthe sub-assembly includes placing a sub-assembly comprising a powerMOSFET device attached to a support substrate.
 13. The method of claim6, wherein the step of placing the sub-assembly includes placing asub-assembly having an electronic chip attached to a support substrate,wherein the support substrate includes a flag with a second conductivestud attached to the flag.
 14. The method of claim 13, furthercomprising the step of contacting the second conductive stud with asecond blocking device in the cavity.
 15. A method for forming asemiconductor device comprising the steps of: placing a sub-assemblyinto a mold apparatus having a cavity, wherein the sub-assemblycomprises an electronic chip attached to a support substrate, andwherein the electronic chip has a first conductive stud coupled thereto,and wherein the support substrate further includes a flag having asecond conductive stud coupled thereto; contacting the first conductivestud with a first blocking device in the cavity; contacting the secondconductive stud with a second blocking device in the cavity; injectingan encapsulating material into the cavity to encapsulate the electronicchip and the flag, wherein the first blocking device masks the firstconductive stud to form a first opening having a chamfered edge in theencapsulating material and overlying the first conductive stud, andwherein the second blocking device masks the second conductive stud toform a second opening having a chamfered edge in the encapsulatingmaterial and overlying the second conductive stud; forming a barrierlayer overlying the first and second conductive studs; attaching a firstsolder ball to the first conductive stud through the first opening,wherein the chamfered edge of the first opening is configured to enhancealignment of the first solder ball in the first opening; and attaching asecond solder ball to the second conductive stud through the secondopening, wherein the chamfered edge of the second opening is configuredto enhance alignment of the second solder in the second opening.
 16. Themethod of claim 15, wherein the step of forming the barrier layerincludes forming a barrier layer comprising nickel.
 17. The method ofclaim 15, wherein the step of contacting the first conductive stud withthe first blocking device includes contacting the first conductive studwith a removable pin having a flat contact surface and rounded edgesadjacent the flat contact surface.